抽象的

FPGA Implementation of Sigma-Delta ADC Using IC MCP3208

B.T.Jayalakshmi, S.Vamsee Krishna

Analog-to-digital converters have many applications in our daily life. The Sigma-Delta converter is an attractive ADC for future communication systems due to its high number of bit rate. The aim of this project is to design of sigma-delta ADC and it is implemented using SPARTAN 3e FPGA.In this project sigma-delta conversion can be done by using the advanced IC MCP3208 and bit by bit transmission is done finally the output is displayed on monitor of pc.The main aim of this project is to power reduction and the converter is used to achieve 12-bit resolution. In MATLAB Simulink the converter done but greater filter delay in the output and it is not suitable for FPGA implementation. To overcome this problems sigma-delta conversion is done using the Xilinx ISE design tool 14.6 and the power comparison calculation is done. In its supply voltage 5v, analog input is taken as potentiometer, by varying the input voltage(12-bits)0-2^12 that means up to 4096 range, through rs232 cable, the output is displayed on monitor. The sigma-delta analog-to-digital converter is suitable for embedded FPGA applications. The sigma-delta architecture has become more and more popular realizing high-resolution ADCs in mixed-signal VLSI processes. This converter is inherently an oversampling converter, although sigma-delta converter is just one of the techniques contributing to the overall performance